Our project aims to address the challenge of interfacing embedded processors, such as the Azadi SoC, with diverse flash memory devices that come with...
Baby Kyber Accelerator
Hamna Mohiuddin
The "Baby Kyber Accelerator" project aims to address the increasing demand for secure communication by developing a specialized hardware accelerator...
Vaquita Vector Coprocessor
Mohammad Latif
Summary The project aims to enhance Nucleus RV Core by adding the RISC-V Vector Extension (RVV v1.0) as a co-processor. Key objectives include...
ASIC Design of OpenTCAM Generated IPs using OpenLane and GF180/SKY130
V Vignesh Karthik
This project involves generating layouts and GDSII files for IPs produced with OpenTCAM, utilising diverse memory structure configurations. TCAM IPs...
